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Maddx Developing Split-table Systolic Arrays to Bridge GPU-TPU Architecture Gap

Dwarkesh Patel Podcast · Reiner Pope – Chip design from the bottom up · May 22, 2026
Maddx Developing Split-table Systolic Arrays to Bridge GPU-TPU Architecture Gap
Dwarkesh Patel Podcast
Dwarkesh Patel Podcast
Reiner Pope – Chip design from the bottom up
"We've talked publicly about something which we call a susplittable systolic array, which is sort of, in some sense, you can think of as like big systolic arrays that can be small systolic arrays as well."
Pope disclosed that his company Maddx is developing what they call split-table systolic arrays, designed to combine the flexibility of GPU-style small compute units with the efficiency of TPU-style large arrays. This architectural innovation aims to capture advantages of both approaches while avoiding their respective trade-offs around data movement and area efficiency.
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Dwarkesh Patel Podcast
Dwarkesh Patel Podcast

Reiner Pope – Chip design from the bottom up

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