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GPUs Are Arrays of Tiny TPUs with Different Trade-offs

By Egleze Editorial Desk · Published July 11, 2026 · Dwarkesh Patel Podcast · Reiner Pope – Chip design from the bottom up
GPUs Are Arrays of Tiny TPUs with Different Trade-offs
Dwarkesh Patel Podcast
Dwarkesh Patel Podcast
Reiner Pope – Chip design from the bottom up

What was said

"At a very high-level point of view, the GPU has a lot of tiny, tiny TPUs tiled across the whole chip. You can sort of think of scaling this thing down into a really tiny unit with a smaller matrix unit, smaller vector unit. And that is sort of what an SM is."

Pope provided a novel architectural comparison showing that GPU streaming multiprocessors are essentially miniature TPUs. The key difference is that GPUs use many small units enabling higher bandwidth between vector and matrix operations through parallel wiring, while TPUs use fewer large units that amortize register file costs better but create data movement bottlenecks.

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Egleze verified who said this and where. The underlying claim has not been independently established by Egleze.

Programme
Dwarkesh Patel Podcast
Episode
Reiner Pope – Chip design from the bottom up
Clip time
1:17:16
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Dwarkesh Patel Podcast
Dwarkesh Patel Podcast

Reiner Pope – Chip design from the bottom up

May 22, 2026 · 5 Egleze moments
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